68040 Microprocessor

As the fourth member of MotorolaÕs 68000 processor family, the 68040 microprocessor is capable of delivering 35 million instructions per second (MIPS) when running at 40 megahertz. The 68040 is a fast, highly integrated, 32-bit microprocessor that combines RISC-like integer performance with floating-point unit power beyond that of a standard processor. The 68040 provides many of the benefits of the fastest RISC microprocessors while also providing the software compatibility that complex instruction set computing (CISC) microprocessors are known for. Benchmark test results show that the 68040 can meet or exceed the performance of 486-class microprocessors running at higher clock speeds. The 68040 is a smooth continuation of the 68000 family, with many new features that contribute to its increased processing power: an integer unit, a floating-point unit (FPU), built-in instruction and data caches (4 KB each), two memory-management units (MMUs), and a bus interface unit. Each unit is highly intelligent and can function independently of the others, giving the 68040 an unprecedented degree of parallelism. The main internal units work at twice the clock speed of the bus interface unit. For instance, when processing most instructions internally, a 68040 clocked at 33 MHz effectively runs at 66 MHz. A cost-reduced version of the 68040, called the 68LC040, has the power of a regular 68040 but without the integrated FPU. In summary, the 68040Õs powerful instruction set allows excellent compatibility with existing applications as well as providing unmatched performance in graphics- and CPU-intensive applications.

68040 Microprocessor Features Pipelining for greater throughput One important way to speed up computing is to design processors that use a common RISC technique called pipelining, which overlaps the processing of several instructions in different stages of execution. For example, the 486-class processor can work on as many as four instructions at a time. The 68040 goes further, handling six instructions simultaneously because of the six-stage pipeline in its integer unit. As confirmed in independent research, this difference translates into superior real-world performance when compared with the 486-class chip.

Integrated caches for faster memory access Because a processor can move at top speed only if it has a steady supply of program instructions and data from memory, most high-performance systems feature cache memories. Caches are intermediate memories, composed of fast static RAM, and are situated between the processor and the main memory. The 68040 has two separate 4-KB caches right on the chip, giving the execution unit rapid access to the information it needs. Having two caches means the 68040 can fetch both data and instructions simultaneously. More than 90 percent of the time, the processor can find the information it needs in the caches. The data cache supports both a writethrough model and a copyback model. Copyback allows the 68040 to hold modified data in the cache until the line needs to be replaced, at which time the data is written to memory. In addition, the 68040 bus interface unit supports a unique Òburst mode,Ó which can refill an entire cache line (128 bits) in just five clock cycles, significantly faster than the leading competitive technology.

Shadow branching for pre-loading new instructions Computers do not usually step through their instructions consecutively. About 75 percent of the time they must skip or branch to another location in their program, and in such cases the processing pipeline must be cleared and loaded with a new sequence of instructions. The 68040 has specialized circuitry that begins filling up with new instructions in advance of the program branch. If the branch is taken, the processor has a head start on the new instruction stream and minimizes the penalty of reloading. Graphics support for faster screen re-draw

Parts of the 68040 instruction set are especially valuable for graphics-intensive applications such as multimedia, and for advanced graphical user interfaces. Graphics processing requires the rapid manipulation of large arrays of data bits representing the thousands of pixels (picture elements) on the computer screen. The ability to quickly handle individual bits, as opposed to bytes and larger data structures, is a must. The 68040, therefore, provides a number of special bit-manipulation instructions. These instructions are lacking on most other microprocessors.

Technical Specifications

Performance

68040 ; 22 MIPS and 3.5 MFLOPS at 25 MHz ; 29 MIPS and 4.6 MFLOPS at 33 MHz ; 35 MIPS and 5.6 MFLOPS at 40 MHz ; 1.3 clock cycles per instruction

68LC040 ; 17.6 MIPS at 20 MHz ; 22 MIPS at 25 MHz ; 29 MIPS at 33 MHz ; 1.3 clock cycles per instruction

Manufacturing technology

; 0.65 µm HCMOS ; 1.2 million transistors

System components

; 4-KB instruction cache ; 4-KB data cache ; Instruction memory management unit ; Data memory management unit ; 6-stage pipeline integer unit ; 32 bit data bus ; Floating-point unit (except 68LC040)